Master bias regulators are employed with Very Large Scale Integration (VLSI) ECL circuitry to provide a reference voltage to slave voltage regulators. The slave voltage regulators in turn provide a reference voltage to EC logic circuits.
In order to gain an appreciation of the operation of the voltage regulator of the invention a detailed description of the prior art is presented. Specifically, there is first described a conventional bias voltage regulator (FIG. 1 and FIG. 1a) for ECL circuitry (FIG. 2) followed by a description of a conventional master voltage regulator (FIG. 3 and FIG. 3a) for use with one or more slave voltage regulators (FIG. 4).
In the Figures a numeral appearing before a device or component designator refers to the Figure number wherein the device appears. For example, transistor 1Q5A of FIG. 1 is thus distinguished from the similarly functioning transistors 3Q5A of FIG. 3 and 5Q5A of FIG. 5.